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  ? semiconductor components industries, llc, 2014 august, 2014 ? rev. 1 1 publication order number: ntgs5120p/d ntgs5120p, nvgs5120p power mosfet ? 60 v, ? 2.9 a, single p ? channel, tsop ? 6 features ? 60 v bvds, low r ds(on) in tsop ? 6 package ? 4.5 v gate rating ? nv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q101 qualified and ppap capable ? this is a pb ? free device applications ? high side load switch ? power switch for printers, communication equipment maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain ? to ? source voltage v dss ? 60 v gate ? to ? source voltage v gs  20 v continuous drain current (note 1) steady state t a = 25 c i d ? 2.5 a t a = 85 c ? 2.0 t  5 s t a = 25 c ? 2.9 power dissipation (note 1) steady state t a = 25 c p d 1.1 w t  5 s 1.4 continuous drain current (note 2) steady state t a = 25 c i d ? 1.8 a t a = 85 c ? 1.3 power dissipation (note 2) t a = 25 c p d 0.6 w pulsed drain current t p = 10  s i dm ? 20 a operating junction and storage temperature t j , t stg ? 55 to 150 c lead temperature for soldering purposes (1/8? from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. surface ? mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [2 oz] including traces) 2. surface ? mounted on fr4 board using the minimum recommended pad size. 3 4 1256 p ? channel tsop ? 6 case 318g style 1 marking diagram xx = device code m = date code  = pb ? free package (note: microdot may be in either location) pin assignment 3 2 1 4 gate drain source 5 6 drain drain drain v (br)dss r ds(on) max i d max ? 60 v 111 m  @ ? 10 v 142 m  @ ? 4.5 v http://onsemi.com xx m   1 1 ? 2.9 a see detailed ordering and shipping information ion page 5 of this data sheet. ordering information
ntgs5120p, nvgs5120p http://onsemi.com 2 thermal resistance maximum ratings parameter symbol value unit junction ? to ? ambient ? steady state (note 3) r  ja 102 c/w junction ? to ? ambient ? t = 5 s (note 3) r  ja 77.6 junction ? to ? ambient ? steady state (note 4) r  ja 200 3. surface ? mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [2 oz] including traces) 4. surface ? mounted on fr4 board using the minimum recommended pad size. electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = ? 250  a ? 60 v zero gate voltage drain current i dss v gs = 0 v, v ds = ? 48 v t j = 25 c ? 1.0  a t j = 125 c ? 5.0 gate ? to ? source leakage current i gss v ds = 0 v, v gs = 12 v  100 na v ds = 0 v, v gs = 20 v  200 na on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = ? 250  a ? 1.0 ? 3.0 v drain ? to ? source on resistance r ds(on) v gs = ? 10 v, i d = ? 2.9 a 72 111 m  v gs = ? 4.5 v, i d = ? 2.5 a 88 142 forward transconductance g fs v ds = ? 5.0 v, i d = ? 6.0 a 10.1 s charges, capacitances and gate resistance input capacitance c iss v gs = 0 v, f = 1 mhz, v ds = ? 30 v 942 pf output capacitance c oss 72 reverse transfer capacitance c rss 48 total gate charge q g(tot) v gs = ? 10 v, v ds = ? 30 v; i d = ? 2.9 a 18.1 nc threshold gate charge q g(th) 1.2 gate ? to ? source charge q gs 2.7 gate ? to ? drain charge q gd 3.6 switching characteristics (note 6) turn ? on delay time t d(on) v gs = ? 10 v, v ds = ? 30 v, i d = ? 1.0 a, r g = 6.0  8.7 ns rise time t r 4.9 turn ? off delay time t d(off) 38 fall time t f 12.8 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = ? 0.9 a t j = 25 c ? 0.75 ? 1.0 v reverse recovery time t rr v gs = 0 v, d is /d t = 100 a/  s, i s = ? 0.9 a 18.3 ns charge time t a 15.5 ns reverse recovery charge q rr 15.1 nc product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 5. pulse test: pulse width  300  s, duty cycle  2% 6. switching characteristics are independent of operating junction temperatures
ntgs5120p, nvgs5120p http://onsemi.com 3 typical characteristics figure 1. on ? region characteristics figure 2. transfer characteristics ? v ds , drain ? to ? source voltage (v) ? v gs , gate ? to ? source voltage (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.5 1.0 1.5 2.0 2.5 3.5 3.9 2.9 1.9 0.9 0.4 0 1.0 2.0 3.0 4.0 5.0 figure 3. on ? resistance vs. gate voltage figure 4. on ? resistance vs. drain current and gate voltage ? v gs , gate ? to ? source voltage (v) ? i d , drain current (a) 10 5.0 4.0 3.0 2.0 0.04 0.06 0.10 7.0 5.0 4.0 3.0 2.0 1.0 0.04 0.05 0.06 0.07 0.09 0.10 figure 5. on ? resistance variation with temperature figure 6. drain ? to ? source leakage current vs. voltage t j , junction temperature ( c) ? v ds , drain ? to ? source voltage (v) 125 100 75 50 25 0 ? 25 ? 50 0.6 0.8 1.0 1.2 1.4 50 40 30 20 10 10 100 1000 10,000 ? i d , drain current (a) ? i d , drain current (a) r ds(on) , drain ? to ? source resistance (  ) r ds(on) , drain ? to ? source res- istance (normalized) ? i dss , leakage (na) v gs = ? 2.2 v ? 2.4 v ? 2.6 v ? 3.0 v ? 3.2 v ? 10 v ? 4.5 v t j = 125 c t j = ? 55 c t j = 25 c v ds ? 10 v 0.08 0.20 i d = ? 2.9 a t j = 25 c r ds(on) , drain ? to ? source resistance (  ) 0.08 t j = 25 c v gs = ? 4.5 v i d = ? 2.9 a v gs = ? 4.5 v 150 60 v gs = 0 v t j = 125 c t j = 150 c 3.0 ? 2.8 v t j = 25 c 1.4 2.4 3.4 6.0 7.0 8.0 9.0 6.0 v gs = ? 10 v 0.12 0.14 0.16 0.18 1.6 1.8
ntgs5120p, nvgs5120p http://onsemi.com 4 typical characteristics c rss q gd figure 7. capacitance variation figure 8. gate ? to ? source voltage vs. total charge ? v ds , drain ? to ? source voltage (v) q g , total gate charge (nc) 30 20 10 0 0 500 600 18 8.0 6.0 2.0 4.0 0 0 1.0 2.0 4.0 5.0 8.0 9.0 10 figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance (  ) ? v sd , source ? to ? drain voltage (v) 100 10 1.0 1.0 10 1000 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 0.2 0.4 0.8 1.0 1.2 c, capacitance (pf) ? v gs , gate ? to ? source voltage (v) t, time (ns) ? i s , source current (a) 40 100 200 300 400 v gs = 0 v t j = 25 c c iss c oss 3.0 6.0 qt q gs t j = 25 c i d = ? 2.9 a vds = ? 30 v v dd = ? 30 v i d = ? 1.0 a v gs = ? 10 v t d(off) t d(on) t r t f 0.9 0.8 v gs = 0 v t j = 25 c 0.6 1300 100 700 1000 1100 800 900 1200 1.4 7.0 16 14 10 12 figure 11. maximum rated forward biased safe operating area 0.1 1 100 v ds , drain ? to ? source voltage (volts) 0.01 100 r ds(on) limit thermal limit package limit 10 10 0 v v gs 20 v single pulse t c = 25 c 1 ms 100  s dc 0.1 1 10 ms 10  s i d , drain current (amps)
ntgs5120p, nvgs5120p http://onsemi.com 5 typical characteristics 0.01 1000 0.01 0.1 1 10 100 1000 10 d = 0.5 r thja(t) , transient thermal response ( c/w) figure 12. thermal response 0.2 0.1 0.05 0.02 0.01 single pulse t, pulse time (s) 1 0.1 0.00001 0.0001 0.001 0.000001 100 table 1. ordering information part number marking (xx) package shipping ? ntgs5120pt1g p6 tsop ? 6 (pb ? free) 3000 / tape & reel NVGS5120PT1G vp6 tsop ? 6 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntgs5120p, nvgs5120p http://onsemi.com 6 package dimensions ? 6 case 318g ? 02 issue v 23 4 5 6 d 1 e b e1 a1 a 0.05 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e1 do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimensions d and e1 are determined at datum h. 5. pin one indicator must be located in the indicated zone. c *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* dim a min nom max millimeters 0.90 1.00 1.10 a1 0.01 0.06 0.10 b 0.25 0.38 0.50 c 0.10 0.18 0.26 d 2.90 3.00 3.10 e 2.50 2.75 3.00 e 0.85 0.95 1.05 l 0.20 0.40 0.60 0.25 bsc l2 ? 0 1 0 1.30 1.50 1.70 e1 e recommended note 5 l c m h l2 seating plane gauge plane detail z detail z 0.60 6x 3.20 0.95 6x 0.95 pitch dimensions: millimeters m style 1: pin 1. drain 2. drain 3. gate 4. source 5. drain 6. drain on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warrant y, representation or guarantee regarding the suitability of it s products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ntgs5120p/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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